6-K

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 6-K

REPORT OF A FOREIGN ISSUER
PURSUANT TO RULE 13A-16 OR 15D-16
OF THE SECURITIES EXCHANGE ACT OF 1934

For November 19, December 3 and December 10, 2008

ASML Holding N.V.

De Run 6501
5504 DR Veldhoven
The Netherlands
(Address of principal executive offices)

Indicate by check mark whether the registrant files or will file annual reports under cover of Form 20-F or Form 40-F.

Form 20-F þ       Form 40-F o

Indicate by check mark whether the registrant by furnishing the information contained in this Form is also thereby furnishing the information to the Commission pursuant to Rule 12g3-2(b) under the Securities Exchange Act of 1934.

Yes o      No þ

If “Yes” is marked, indicate below the file number assigned to the registrant in connection with Rule 12g3-2(b):

TABLE OF CONTENTS

EX-99.1

EX-99.2

EX-99.3

EX-99.4

Exhibits

99.1	“ASML Sets Productivity Records Across the Spectrum of TWINSCAN Models; Establishes New Standards of Semiconductor Manufacturing Capability,” press release dated November 19, 2008
99.2	“ASML Launches the TWINSCAN NXT:1950i Immersion Lithography System Enabling Faster and More Accurate Chip Production at Leading-edge Resolutions,” press release dated December 3, 2008
99.3	“ASML and Brion Bring Computational Lithography to the Fab,” press release dated December 3, 2008
99.4	Barclays Capital Global Technology Conference, presentation dated December 10, 2008.

          “Safe Harbor” Statement under the US Private Securities Litigation Reform Act of 1995: the matters discussed in this document may include forward-looking statements, including statements made about our outlook, realization of backlog, IC unit demand, financial results, average sales price, gross margin and expenses. These forward looking statements are subject to risks and uncertainties including, but not limited to: economic conditions, credit market deterioration on consumer confidence which could affect our customers, product demand and semiconductor equipment industry capacity, worldwide demand and manufacturing capacity utilization for semiconductors (the principal product of our customer base), competitive products and pricing, manufacturing efficiencies, new product development and customer acceptance of new products, ability to enforce patents and protect intellectual property rights, the outcome of intellectual property litigation, availability of raw materials and critical manufacturing equipment, trade environment, changes in exchange rates and other risks indicated in the risk factors included in ASML’s Annual Report on Form 20-F and other filings with the US Securities and Exchange Commission.

SIGNATURES

          Pursuant to the requirements of the Securities Exchange Act of 1934, the registrant has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.

	ASML HOLDING N.V. (Registrant)
Date: December 11, 2008	By:	/s/ Peter T.F.M. Wennink
	Peter T.F.M. Wennink
		Executive Vice President and Chief Financial Officer

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EX-99.1

Exhibit 99.1

ASML Media Relations Contacts

Lucas van Grinsven — Corporate Communications – +31 40 268 3949

Ryan Young — Corporate Communications – +81 3 5793 1846

ASML Investor Relations Contacts

Craig DeYoung — Investor Relations – +1 480 383 4005

Franki D’Hoore — Investor Relations – +31 40 268 6494

ASML Sets Productivity Records Across the Spectrum of TWINSCAN Models; Establishes New Standards of Semiconductor Manufacturing Capability

VELDHOVEN, the Netherlands — November 19, 2008 — ASML Holding NV (ASML) today announces that productivity records have been set by its TWINSCAN™ platform of lithography systems. 76 TWINSCAN systems have now reached the milestone of processing more than one million wafers in 12 months’ time.

In October 2007 a TWINSCAN XT:400E iLine scanner was the first system to process one million wafers within a 365 day period. One year later that achievement has grown to 76 systems and includes iLine, KrF and ArF models. Approximately two-thirds of the record setting systems are processing 300-mm wafers, with the remaining third running 200-mm wafers.

“Three years ago we started an ambitious productivity program. We set a target that a customer should be able to process one million wafers on one scanner within one year. We knew this would require innovative improvements in design as well as improved integration with remote and on-site customer service. Many customers used the opportunity to introduce their own process flow improvements to the program. Thanks to this combined focus and dedication, we managed to set a new standard in lithography productivity,” said Frits van Hout, designate member of ASML’s Board of Management who was in charge of Customer Service at the start of the program.

“These achievements demonstrate ASML’s commitment to continuous improvement of value of ownership for our customers, whether through shrink of features or, as in this case, higher productivity,” said Martin van den Brink, ASML’s executive vice president of marketing and technology. “By providing industry-leading productivity ASML’s customers benefit as they have an opportunity to produce more chips and generate more revenue.”

About ASML

ASML is the world’s leading provider of lithography systems for the semiconductor industry, manufacturing complex machines that are critical to the production of integrated circuits or chips. Headquartered in Veldhoven, the Netherlands, ASML is traded on Euronext Amsterdam and

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NASDAQ under the symbol ASML. ASML has more than 6,750 employees, serving chip manufacturers in more than 60 locations in 16 countries.

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EX-99.2

Exhibit 99.2

ASML Media Relations Contacts

Lucas van Grinsven — Corporate Communications – +31 40 268 3949

Ryan Young — Corporate Communications – +81 3 5793 1846

ASML Investor Relations Contacts

Craig DeYoung — Investor Relations – +1 480 383 4005

Franki D’Hoore — Investor Relations – +31 40 268 6494

ASML Launches the TWINSCAN NXT:1950i Immersion Lithography System Enabling Faster and More Accurate Chip Production at Leading-edge Resolutions

Tokyo, Japan, December 3, 2008 — ASML Holding NV (ASML) today announces at SEMICON Japan the first system based on its new NXT lithography platform. The TWINSCAN™ NXT:1950i provides the increased productivity and extremely tight overlay that will enable chip manufacturers to shrink feature sizes to 32 nanometers and beyond in order to reduce costs — a nanometer is a millionth of a millimeter.

Feature shrink is the primary semiconductor cost reducer and chipmakers continue to shrink their designs as aggressively as they can. Today, this shrink is enabled by single-exposure immersion lithography. Double-patterning techniques with immersion scanners will also be used to make chip features smaller and continue Moore’s Law — which states that the number of transistors on a chip doubles every 24 months.

Double-patterning poses productivity challenges for chipmakers because a chip’s critical layers need to be exposed and processed twice adding complexity and cost. At the same time, chip makers demand ever more efficient single-patterning processes to remain competitive. ASML addresses these challenges with the new NXT platform. As announced in October of this year, the NXT platform is based on the proven TWINSCAN dual-stage architecture. New to the NXT is an improved dual-stage design that has higher acceleration, provides an increase in maximum scan speeds and reduces overhead time with seamless stage exchange. As a result, the NXT:1950i is designed for more than 200 wafers per hour which will enable chip makers to process 30 percent more silicon wafers per hour than today’s most advanced systems. ASML expects the NXT:1950i to process well over 4,000 wafers per day in volume manufacturing of memory chips.

Sophisticated semiconductor manufacturing also sets stringent requirements for overlay, the accuracy with which chip layers are imaged relative to one another. The TWINSCAN dual-stage architecture is able to measure the process-induced wafer deformation without productivity loss, using multiple alignment markers. This is only possible in dual-wafer stage systems such as TWINSCAN, which are able to drive productivity and overlay at the same time. In addition, the NXT platform features a shorter, more accurate measurement beam resulting in a 50 percent

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improvement in stage position control. The NXT:1950i is capable of 2.5-nanometer overlay making it suitable for all double-patterning techniques and advanced single-patterning processes.

The incredible imaging ability of a 1.35 numerical aperture (NA) lens enables single-patterning imaging at a resolution of 38 nanometers as well as cost-effective deployment of double patterning techniques in 32-nanometer and 22-nanometer processes.

In addition to these improvements in productivity and overlay, the NXT:1950i features a next generation immersion control system enabling the higher scan speeds while reducing defectivity by a factor of 2 to 3.

The new TWINSCAN NXT:1950i is the flagship in ASML’s portfolio. This portfolio leverages our technological innovations beyond the scanner which constitutes a more holistic approach to lithography and delivers immediate and tangible benefits for semiconductor manufacturers. Holistic Lithography integrates computational and fab lithography to increase process windows and allow chip makers to produce more, good die per wafer at a lower average cost.

ASML has received multiple orders from customers for the NXT:1950i and has scheduled shipments for the first half of 2009.

About the TWINSCAN lithography architecture

The TWINSCAN dual stage architecture is the only one of its kind and the de facto standard for 300-mm lithography production. More than 900 TWINSCAN systems are operating in the field today.

About double patterning

Double patterning (DPT) describes a variety of lithography techniques that involve splitting a complex layer pattern into two (or more) simpler patterns, and exposing them separately to recreate the original layer pattern on the wafer. This allows features to be created on the wafer that are smaller than could be resolved by the scanner in a single exposure. DPT using ArFi lithography is currently seen as the most likely technology for production at 32 nanometers. The accuracy required to align the multiple patterns places much tighter critical dimension uniformity (CDU) and overlay than the single-exposure techniques used to date. In addition, multiple lithography steps per layer mean ultra-high throughput lithography systems are needed to maintain fab productivity.

About ASML

ASML is the world’s leading provider of lithography systems for the semiconductor industry, manufacturing complex machines that are critical to the production of integrated circuits or chips. Headquartered in Veldhoven, the Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol ASML. ASML has more than 6,750 employees, serving chip manufacturers in more than 60 locations in 16 countries.

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EX-99.3

Exhibit 99.3

ASML Media Relations Contacts

Lucas van Grinsven — Corporate Communications – +31 40 268 3949

Reeka Ninomiya — Corporate Communications – +1 408 200 0842

ASML Investor Relations Contacts

Craig DeYoung — Investor Relations – +1 480 383 4005

Franki D’Hoore — Investor Relations – +31 40 268 6494

ASML and Brion Bring Computational Lithography to the Fab

Tokyo, Japan, December 3, 2008 — ASML and its subsidiary Brion Technologies today announce LithoTuner™, a new suite of products that integrates computational and wafer lithography to improve semiconductor manufacturability. LithoTuner Pattern Matcher and LithoTuner Pattern Matcher FullChip take scanner matching to a whole new level, with improvements ranging from 30-70% over current scanner matching techniques.

Pattern Matcher optimizes matching over a set of customer selected patterns using adjustments such as numerical aperture (NA), dose and illumination. Pattern Matcher is available for TWINSCAN™ immersion, ArF dry and KrF systems.

Meanwhile, Pattern Matcher FullChip extends current scanner matching practices by leveraging Brion’s verification engine to identify all the critical patterns across the entire chip that need to be matched. By coupling this computational analysis with an interface to ASML scanners, a comprehensive matching solution is made available; giving chip makers access to a larger set of tuning adjustments. The additional benefit of this holistic approach is that scanners can be optimized depending on the different chip designs. For the first time, scanner matching optimization can cover the full chip and all customer selected patterns over the entire process window, tuning each scanner in the fab for every product. With a fully tuned fab, customers can increase system utilization by releasing product dedication to scanners for improved process latitude and a better return on their lithography investments.

“LithoTuner shows the benefits of combining computational lithography with detailed scanner knowledge” said Martin van den Brink, executive vice president marketing and technology at ASML. “ASML is the only company that can tie these capabilities together into a holistic lithographic approach.”

Pattern Matcher FullChip has gone through successful evaluations at leading semiconductor manufacturers. “By using Pattern Matcher FullChip we were able to identify various product-specific critical patterns to include in our matching optimization,” said John Lin director of Manufacturing Technology Center at TSMC. “We have seen scanner performance improvement on product imaging through ASML’s computational lithography capabilities.”

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“With Pattern Matcher FullChip, ASML and Brion have broken down the barrier between manufacturing and design,” remarked Jim Koonmen, general manager for Brion. “Instead of a generic ‘design for manufacturing’ approach, LithoTuner allows manufacturing to individually optimize each scanner to each design.”

LithoTuner Pattern Matcher products will be available in the first quarter of 2009.

About Immersion, ArF and KrF

Immersion lithography systems transfer patterns to wafers by projecting light through highly purified water between the lens and the wafer, enabling chipmakers to print smaller features with the same wavelength of light. ArF immersion (ArFi) technology has become the de facto standard for chip production at 55 nm and below.

ASML was the first manufacturer to introduce immersion lithography, shipping its first TWINSCAN immersion system in 2004. ASML remains the worldwide leader in the field which continues to grow rapidly. More than 120 ASML immersion systems have been shipped to 20 different customers and have imaged more than 30 million wafers resulting in hundreds of millions of electronic devices powered by immersion-manufactured chips.

About Computational Lithography

Computational lithography is the use of computer modeling to predict, correct, optimize and verify imaging performance of the lithography process over a range of patterns, process, and system conditions.

About Holistic Lithography

Holistic lithography is the integration of computational and fab lithography to optimize imaging performance from mask design to factory manufacturing

About Brion Technologies

Brion Technologies is an ASML company and industry leader in computational lithography for integrated circuits. Brion’s Tachyon™ platform, an OPC and OPC verification system, enables capabilities that address chip design, photomask making and wafer printing for semiconductor manufacturing. Brion is headquartered in Santa Clara, California. For more information: www.brion.com

About ASML

ASML is the world’s leading provider of lithography systems for the semiconductor industry, manufacturing complex machines that are critical to the production of integrated circuits or chips. Headquartered in Veldhoven, the Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol ASML. ASML has more than 6,750 employees, serving chip manufacturers in more than 60 locations in 16 countries.

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EX-99.4

Exhibit 99.4

Barclays Capital Global Technology Conference San Francisco, CA Craig DeYoung VP Investor Relations and Corporate Communications December 10th, 2008

Safe Harbor "Safe Harbor" Statement under the US Private Securities Litigation Reform Act of 1995: the matters discussed in this document may include forward-looking statements, including statements made about our outlook, realization of backlog, IC unit demand, financial results, average sales price, gross margin and expenses. These forward looking statements are subject to risks and uncertainties including, but not limited to: economic conditions, credit market deterioration on consumer confidence which could affect our customers, product demand and semiconductor equipment industry capacity, worldwide demand and manufacturing capacity utilization for semiconductors (the principal product of our customer base), competitive products and pricing, manufacturing efficiencies, new product development and customer acceptance of new products, ability to enforce patents and protect intellectual property rights, the outcome of intellectual property litigation, availability of raw materials and critical manufacturing equipment, trade environment, changes in exchange rates and other risks indicated in the risk factors included in ASML's Annual Report on Form 20-F and other filings with the US Securities and Exchange Commission.

ASML - the world's largest supplier of lithography equipment Source: Semi & ASML Leadership in immersion for volume chip manufacturing ASML Canon Nikon East 65 11 24 West North Canon 11% ASML 65% Nikon 24% ASML AMAT TELL KLA East 22 32 25 11 10 West North KLA Tencor ASML Tokyo Electron Lam Research Applied Materials 2003 2004 2005 2006 2007 Q1 1543 2465 2529 3597 3768 Revenue evolution Top 5 semiconductor equipment suppliers Market share 2007

Agenda Market ASML's Robustness

Market

Macro and sector trends Challenging customer environment Product overcapacity Low DRAM and FLASH memory prices Access to capital M&A negotiations Demand for capacity expansion remains extremely weak Significant weakening in the last 2 to 3 months Virtually no 300mm lithography capacity growth between 2007 and 2008 Retirement of 200mm memory fabs, reduced output of some 300mm fabs Immersion demand continues 2008: 4x nm Flash, 5x nm DRAM 2009: 3x nm Flash, 5x nm DRAM 2nd tier, 4x nm DRAM 1st tier, 4x nm Foundry

DRAM manufacturers with most aggressive shrink post highest operating margins Operating margins vs. technology nodes of main DRAM manufacturers Source: DRAMeXchange (8/08), ASML Marketing (Fab dBase) - -120% - -100% - -80% - -60% - -40% - -20% 0% 20% 40% 60% Q1 05 Q2 05 Q3 05 Q4 05 Q1 06 Q2 06 Q3 06 Q4 06 Q1 07 Q2 07 Q3 07 Q4 07 Q1 08 Q2 08 Operating Margin Most advanced node in Q2/08: 5x nm 5x nm 6x nm 6x nm 6x nm 7x nm 7x nm 7x nm

Robustness

Sound gross margin performance 0 200 400 600 800 1000 1200 Revenue [Thousands] 10% 15% 20% 25% 30% 35% 40% 45% Revenue Gross margin Q4 guidance Q1 03 Q3 03 Q1 04 Q3 04 Q1 05 Q3 05 Q1 06 Q3 06 Q1 07 Q3 07 Q1 08 Q3 08 Gross margin

Gross margin dynamics Cost of goods reduction program Litho tool sales mix Euro / Yen / Dollar exchange rate ASML factory loading Product maturity Sales discount Due to cost improvements and management of the above, gross margin is expected to be approximately 36% at revenue levels of € 550 million

Near term operating expense dynamics R&D "Spend on strategic programs and save on efficiency" High level of strategic investment to meet customer requirements for shrink Efficiency produces € 6 million savings in Q4 SG&A Improved efficiency provided 19% cost reduction from Q2 to Q4

Robust operating margin performance with R&D expenditures increased >50% in the last 3 years 370 329 0 200 400 600 800 1000 1200 Revenue [Thousands] - -30% - -20% - -10% 0% 10% 20% 30% Revenue Operating margin Q1 03 Q3 03 Q1 04 Q3 04 Q1 05 Q3 05 Q1 06 Q3 06 Q1 07 Q3 07 Q1 08 Q3 08 Operating margin

Profitability Stress test Operating Profit R&D + SG&A € 170 million per quarter 2,500 2008 estimate Q1-Q3 actuals + Q4 guidance Net Sales Gross margin 1,750 2,000 2,250 2,750 3,000 3,250 3,500 3,750 4,000 30% - -155 - - 80 - - 5 70 145 220 295 370 445 520 32% - -120 - - 40 40 120 200 280 360 440 520 600 34% - - 85 0 85 170 255 340 425 510 595 680 36% - - 50 40 130 220 310 400 490 580 670 760 38% - - 15 80 175 270 365 460 555 650 745 840 40% 20 120 220 320 420 520 620 720 820 920 42% 55 160 265 370 475 580 685 790 895 1000 44% 90 200 310 420 530 640 750 860 970 1080 46% 125 240 355 470 585 700 815 930 1045 1160 48% 160 280 400 520 640 760 880 1000 1120 1240 50% 195 320 445 570 695 820 945 1070 1195 1320 Note: Data in the table is not intended as company guidance

Solid financial position Conservatively financed Cash & cash equivalents € 1.3 billion Debt € 600 million 5.75% Notes due 2017 Standby facility € 500 million due 2012 Cash generative

Tough times call for product roadmap strengthening Driving higher product value through performance enhancement and cost reductions Strengthening leadership in immersion, the TWINSCAN XT:1950 with highest NA available today allows 38 nm resolution and offers 25% overall performance improvement Introducing the TWINSCAN NXT multipurpose platform with substantially higher speed and overlay accuracy addressing 32 nm resolution and beyond, shipping in 2009 Starting 2010, EUV systems with high speed performance goals of >140 wph and resolution of 22 nm and beyond, will change litho cost dynamics leading to wide spread adoption

Immersion on track Shipped 46 immersion systems YTD Booked 16 immersion systems in Q3 Backlog contains 27 immersion systems with value of Euro 750 - ASP of Euro 27.8 million

Taiwan Europe USA Korea Other Japan China 14 11 30 14 6 25 memory IDM Foundry 42 43 15 0 0 0 immersion KrF 1-line ArF dry 73 6 2 19 Backlog lithography in value per Sep 28th, 2008 Total value M€ 1,028 Technology i-Line 2% ArF immersion 73% KrF 6% ArF dry 19% Region USA 30% Taiwan 14% Korea 14% Other 6% Europe 11% Japan 25% End-use Memory 42% IDM 43% Foundry 15% Numbers have been rounded for readers' convenience