-----BEGIN PRIVACY-ENHANCED MESSAGE----- Proc-Type: 2001,MIC-CLEAR Originator-Name: webmaster@www.sec.gov Originator-Key-Asymmetric: MFgwCgYEVQgBAQICAf8DSgAwRwJAW2sNKK9AVtBzYZmr6aGjlWyK3XmZv3dTINen TWSM7vrzLADbmYQaionwg5sDW3P6oaM5D3tdezXMm7z1T+B+twIDAQAB MIC-Info: RSA-MD5,RSA, TugfmZndyjgbl7J+sRJOiPGjKJAZDqAG91nReIwampONB2oPVS9aJv5zMqbhgbZt cWCXjmntDT6P86DyCMUZKA== <SEC-DOCUMENT>0001178913-09-001208.txt : 20090522 <SEC-HEADER>0001178913-09-001208.hdr.sgml : 20090522 <ACCEPTANCE-DATETIME>20090519070423 ACCESSION NUMBER: 0001178913-09-001208 CONFORMED SUBMISSION TYPE: 6-K PUBLIC DOCUMENT COUNT: 1 CONFORMED PERIOD OF REPORT: 20090519 FILED AS OF DATE: 20090519 DATE AS OF CHANGE: 20090519 FILER: COMPANY DATA: COMPANY CONFORMED NAME: TOWER SEMICONDUCTOR LTD CENTRAL INDEX KEY: 0000928876 STANDARD INDUSTRIAL CLASSIFICATION: SEMICONDUCTORS & RELATED DEVICES [3674] IRS NUMBER: 000000000 FISCAL YEAR END: 1231 FILING VALUES: FORM TYPE: 6-K SEC ACT: 1934 Act SEC FILE NUMBER: 000-24790 FILM NUMBER: 09838209 BUSINESS ADDRESS: STREET 1: RAMAT GAVRIEL STREET 2: P O BOX 619 CITY: MIGDAL HAEMEK 23105 STATE: L3 BUSINESS PHONE: 97246506611 MAIL ADDRESS: STREET 1: RAMAT GAVRIEL STREET 2: P O BOX 619 CITY: MIGDAL HAEMEK 23105 STATE: L3 ZIP: N-A </SEC-HEADER> <DOCUMENT> <TYPE>6-K <SEQUENCE>1 <FILENAME>zk96796.htm <TEXT> <HTML> <HEAD> <!-- Created by EDGAR Ease Plus (EDGAR Ease+) --> <!-- Project: \\Backup\edgar filing\Tower Semiconductor Ltd\96796\a96796.eep --> <!-- Control Number: 96796 --> <!-- Rev Number: 1 --> <!-- Client Name: Tower Semiconductor Ltd --> <!-- Project Name: 6-K --> <!-- Firm Name: Zadok-Keinan Ltd --> <TITLE>6-K</TITLE> </HEAD> <BODY> <!-- MARKER FORMAT-SHEET="Scotch Rule Top-TNR" FSL="Workstation" --> <HR ALIGN=LEFT WIDTH=100% SIZE=4 NOSHADE STYLE="margin-top: -5px"> <HR ALIGN=LEFT WIDTH=100% SIZE=1 NOSHADE STYLE="margin-top: -10px"> <!-- MARKER FORMAT-SHEET="Head Major Center Bold-TNR" FSL="Workstation" --> <H1 ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE=4>FORM 6-K </FONT></H1> <!-- MARKER FORMAT-SHEET="Head Minor Center-TNR" FSL="Workstation" --> <P ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE="4"><B>SECURITIES AND EXCHANGE COMMISSION</B> </FONT> </P> <!-- MARKER FORMAT-SHEET="Head Minor Center-TNR" FSL="Workstation" --> <P ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE=2>Washington, D.C. 20549 </FONT></P> <!-- MARKER FORMAT-SHEET="Head Left-TNR" FSL="Workstation" --> <P ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE=2>For the month of May 2009 No. 4 </FONT></P> <!-- MARKER FORMAT-SHEET="Head Major Center Bold-TNR" FSL="Workstation" --> <p ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE="5"><B>TOWER SEMICONDUCTOR LTD.</B> </FONT><BR> <FONT FACE="Times New Roman, Times, Serif" SIZE=2>(Translation of registrant’s name into English) </FONT></P> <!-- MARKER FORMAT-SHEET="Head Major Center Bold 1-TNR" FSL="Workstation" --> <p ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE="2"><B>Ramat Gavriel Industrial Park</B> </FONT> <BR> <FONT FACE="Times New Roman, Times, Serif" SIZE="2"><B>P.O. Box 619, Migdal Haemek, Israel 23105</B> </FONT><BR> <FONT FACE="Times New Roman, Times, Serif" SIZE=2>(Address of principal executive offices) </FONT></P> <!-- MARKER FORMAT-SHEET="Para Indent Lv 0-TNR" FSL="Default" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2> Indicate by check mark whether the registrant files or will file annual reports under cover Form 20-F or Form 40-F. </FONT></P> <P align=center><FONT FACE="Times New Roman, Times, Serif" SIZE=2> Form 20-F <FONT size="3" face="Wingdings">x </font> Form 40-F <FONT size="3" face="Wingdings">o </font></FONT></P> <!-- MARKER FORMAT-SHEET="Para Indent Lv 0-TNR" FSL="Default" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2> Indicate by check mark whether the registrant by furnishing the information contained in this Form is also thereby furnishing the information to the Commission pursuant to Rule 12g3-2(b) under the Securities Exchange Act of 1934. </FONT></P> <P align=center><FONT FACE="Times New Roman, Times, Serif" SIZE=2> Yes <FONT size="3" face="Wingdings">o </font> No <FONT size="3" face="Wingdings">x </font> </FONT></P> <p align=center> <font size=2></font></p> <HR SIZE="1" NOSHADE STYLE="margin-top: -2px"><HR SIZE="4" NOSHADE STYLE="margin-top: -10px"> <page> <!-- MARKER FORMAT-SHEET="Para Large Indent Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2> On May 19, 2009, the registrant announce industry’s first scalable Rdson design tool for growing Power Management market. </FONT></P> <!-- MARKER FORMAT-SHEET="Para Indent Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2> This Form 6-K is being incorporated by reference into all effective registration statements filed by us under the Securities Act of 1933. </FONT></P> <p align=center> <font size=2></font></p> <HR SIZE="1" NOSHADE STYLE="margin-top: -2px"><HR SIZE="4" NOSHADE STYLE="margin-top: -10px"> <page> <!-- MARKER FORMAT-SHEET="Head Major Center Bold-TNR" FSL="Workstation" --> <H1 ALIGN=CENTER><FONT FACE="Times New Roman, Times, Serif" SIZE=2>SIGNATURES </FONT></H1> <!-- MARKER FORMAT-SHEET="Para Indent Lv 0-TNR" FSL="Default" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2> Pursuant to the requirements of the Securities Exchange Act of 1934, the registrant has duly caused this report to be signed on its behalf by the undersigned, thereunto duly authorized. </FONT></P> <!-- MARKER FORMAT-SHEET="Signature (Single)" FSL="Workstation" --> <TABLE WIDTH=100% CELLSPACING=0 CELLPADDING=0 BORDER=0> <TR VALIGN=TOP> <TD WIDTH=40%><FONT FACE="Times New Roman, Times, Serif" SIZE=2><BR><BR><BR>Date: May 19, 2009</FONT></TD> <TD WIDTH=10%><FONT FACE="Times New Roman, Times, Serif" SIZE=2></FONT></TD> <TD WIDTH=50%><FONT FACE="Times New Roman, Times, Serif" SIZE=2><B>TOWER SEMICONDUCTOR LTD.</B><BR><BR> <BR>By: /s/ Nati Somekh Gilboa<BR>——————————————<BR> Nati Somekh Gilboa<BR>Corporate Secretary</FONT></TD> </TR> </TABLE> <BR> <p align=center> <font size=2></font></p> <HR SIZE="1" NOSHADE STYLE="margin-top: -2px"><HR SIZE="4" NOSHADE STYLE="margin-top: -10px"> <page> <P align=center><FONT FACE="Times New Roman, Times, Serif" SIZE="4"><B>Tower and Jazz Semiconductor Announce Industry's First Scalable <BR>Rdson Design Tool for Growing Power Management Market</B> </FONT> </P> <P align=center><FONT FACE="Times New Roman, Times, Serif" SIZE="2"><B>Enables 10-40% Smaller Die Sizes for Popular Driver Circuits and Faster Design <BR>Cycle Times</B> </FONT></P> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2>MIGDAL HAEMEK, Israel and NEWPORT BEACH, Calif., May 19, 2009 – Tower Semiconductor, Ltd. (NASDAQ: TSEM, TASE: TSEM), and its fully owned U.S. subsidiary Jazz Semiconductor, Inc., today announced an industry first scalable Rdson versus breakdown voltage design kit technology (TS18PM) to enable 10-40% smaller die sizes and faster design cycle times targeted at the growing power management market. The TS18PM sets a new standard for design flexibility by providing a wide range of process modules under one design kit environment. The capability to maximize design IP re-use over many market spaces with optimized die size/cost enables customers to reach markets at design cycle times considered unattainable only a few years ago. The Tower/Jazz BCD platform addresses 80% of the growing $11 Billion power management IC market and targets applications such as leading-edge LED drivers, motor controllers, battery management, and Class-D amplifiers. </FONT></P> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2>The TS18PM process offers high voltage LDMOS FETs that take advantage of 0.18-micron rules to reduce on-resistance and size of power cells, enabling optimization and the smallest possible die area for every power transistor versus competitive solutions. It also includes a unique Y-FLASH zero mask adder multi-time-programming non-volatile memory (MTP NVM) solution from 64bits for trimming applications to 64 Kilobits for code storage applications. The TS18PM design kit includes 20v-60v scalable Rdson NLDMOS/PLDMOS devices as well as advanced 0.18-micron CMOS and bipolar NPN devices needed in today’s complex power management chips. It also includes industry leading RF and Thermal modeling, predictive parasitic extraction switch, high voltage ESD solutions, and extremely dense 5v and 1.8v digital cell libraries for “digital intensive” designs. In addition, it allows the ability to streamline the process to a very “cost effective” 20 layers (TS35PM) for Power stage dominated designs. </FONT></P> <p align=center> <font size=2></font></p> <HR SIZE="1" NOSHADE STYLE="margin-top: -2px"><HR SIZE="4" NOSHADE STYLE="margin-top: -10px"> <page> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2>“The Tower/Jazz power platform fully satisfied our requirements for accuracy, high quality, and low cost in the design and development of our LED lighting and power driver solutions,” said Dong Cheol, Kim, CEO and President of Dongwoon Anatech. “Along with excellent customer service, we realized superb design, parameter, and modeling accuracy by utilizing their industry leading BCD process and design kit.” </FONT></P> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE=2>“The combined design enablement talents of Tower and Jazz have created the most designer centric/friendly power design kit on the market,” said Dr. Avi Strum, Specialty Business Unit Vice President, Tower Semiconductor. “In addition, the design kit will serve as a springboard to our newest power platform offerings of >100v and Ultra Low Rdson devices.” </FONT></P> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Workstation" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE="2"><B>About Tower Semiconductor, Ltd. and Jazz Semiconductor, Inc.</B><BR>Tower Semiconductor Ltd. (NASDAQ: TSEM, TASE: TSEM) is a pure-play independent specialty wafer foundry and its fully owned U.S. subsidiary Jazz Semiconductor, Inc., is a leader in Analog-Intensive Mixed-Signal (AIMS) foundry solutions. Tower and Jazz manufacture integrated circuits with geometries ranging from 1.0 to 0.13-micron and provide complementary technical services and design support. In addition to digital CMOS process technology, Tower offers advanced mixed-signal and RF CMOS, Power Management, CMOS image-sensor, non-volatile memory technologies and Flash MTP and OTP solutions. Jazz’s comprehensive process portfolio of modular AIMS technologies includes RFCMOS, Analog CMOS, Silicon and SiGe BiCMOS, SiGe C-BiCMOS, Power CMOS and High Voltage CMOS. To provide world-class customer service, Tower maintains two manufacturing facilities in Israel; Jazz maintains a fab in the U.S. and additional manufacturing capacity in China through partnerships with ASMC and HHNEC. For more information, please visit <U>www.towersemi.com</U> and <U>www.jazzsemi.com</U>. </FONT> </P> <!-- MARKER FORMAT-SHEET="Para Flush Lv 0-TNR" FSL="Default" --> <P><FONT FACE="Times New Roman, Times, Serif" SIZE="2"><B>Safe Harbor Regarding Forward-Looking Statements</B><BR>This press release includes forward-looking statements, which are subject to risks and uncertainties. Actual results may vary from those projected or implied by such forward-looking statements. A complete discussion of risks and uncertainties that may affect the accuracy of forward-looking statements included in this press release or which may otherwise affect Tower’s and Jazz’s business is included under the heading “Risk Factors” in Tower’s most recent filings on Forms 20-F, F-3, F-4 and 6-K, as were filed with the Securities and Exchange Commission (the “SEC”) and the Israel Securities Authority and Jazz’s most recent filings on Forms 10-K and 10-Q, as were filed with the SEC. Tower and Jazz do not intend to update, and expressly disclaim any obligation to update, the information contained in this release. </FONT> </P> <TABLE CELLPADDING=0 CELLSPACING=0 BORDER=0 WIDTH=600> <TR VALIGN=Bottom> <TH><FONT FACE="Times New Roman" SIZE=1></FONT></TH> <TH><FONT FACE="Times New Roman" SIZE=1></FONT></TH></TR> <TR VALIGN=Bottom> <TD WIDTH=57% ALIGN=LEFT><FONT FACE="Times New Roman" SIZE="2"><B>Company Contact:</B> </FONT></TD> <TD WIDTH=43% ALIGN=LEFT><FONT FACE="Times New Roman" SIZE="2"><B>Media Contact:</B> </FONT></TD></TR> <TR VALIGN=Bottom> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE=2>Melinda Jarrell</FONT></TD> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE=2>Lauri Julian</FONT></TD></TR> <TR VALIGN=Bottom> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE=2>949/435-8181</FONT></TD> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE=2>949/715-3049</FONT></TD></TR> <TR VALIGN=Bottom> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE="2"><U>melinda.jarrell@tower-usa.com</U> </FONT></TD> <TD ALIGN=LEFT><FONT FACE="Times New Roman" SIZE="2"><U>lauri.julian@jazzsemi.com</U> </FONT></TD></TR> </TABLE> <BR> <p align=center> <font size=2></font></p> <HR SIZE="1" NOSHADE STYLE="margin-top: -2px"><HR SIZE="4" NOSHADE STYLE="margin-top: -10px"> </body> </html> </TEXT> </DOCUMENT> </SEC-DOCUMENT> -----END PRIVACY-ENHANCED MESSAGE-----