Exhibit 10.1

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Agreement

Between

NXP SEMICONDUCTORS NETHERLANDS B.V.

And

DSP GROUP, INC.

And

DSP GROUP LTD.

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Agreement

THE UNDERSIGNED:

(1) NXP SEMICONDUCTORS NETHERLANDS B.V., a limited liability company incorporated under the laws of the Netherlands with corporate seat in Eindhoven, the Netherlands and having its address at High Tech Campus 60, 5656 AG Eindhoven, the Netherlands (“NXPBV”), acting on behalf of itself and also acting for the benefit of its Affiliates (collectively “NXP”),

and

(2) DSP GROUP, INC., a company incorporated under the laws of the State of Delaware, United States of America, having its address at 2580 North First Street, Suite 460, San Jose, CA 95131, United States of America (“DSPG INC”),

and

(3) DSP GROUP LTD., a private company with limited liability incorporated under the laws of Israel, with corporate seat in Herzeliya, Israel and having its address at 5 Shenkar Street, Herzeliya, 46120, Israel (“DSPG LTD”), entering into this Agreement on behalf of itself and its Affiliates, the obligations of which shall be guaranteed by DSPG INC as provided for in Clause 14 of the SBSA,

DSPG INC, DSPG LTD (each, or collectively, as applicable, “DSPG”) and NXP shall also be referred to as “Parties” or a “Party”, as the case may be.

WHEREAS:

(A) Following negotiations, the Parties agreed to adjust the commercial understandings between them - anchored in the various contracts and SLAs signed between the Parties in connection to the 2007 acquisition by DSPG of NXP’s cordless and VOIP terminals business (hereinafter, the “Contracts”) - to accommodate the changing needs and constraints of all Parties and thus continue their collaboration on an amicable basis;

(B) The Parties wish to achieve a high as possible level of clarity to facilitate their mutual and separate planning for the short and long term;

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IT IS AGREED AS FOLLOWS:

1 INTERPRETATION

1.1 New Definitions

Capitalized words in this Agreement (including the preamble and recitals), shall have the same meaning as set out in the Contracts, except if defined otherwise herein and unless the subject or context otherwise requires, and the following definitions are added as follows:

“APK” means the NXP facility located in Kaohsiung, Taiwan

“CAEN” means the Service Level Agreement regarding Support Services to Manufacturing Operations for DSPG by CAEN dated April 7, 2008.

“Design, Test and Software Tools” means the design components, electronic design automation and test tools and software, as per the format, set forth in Annex A.

“Die Bank” means a manageable storage of Sorted Wafers at APK that shall provide interface for monitoring inventory and releasing wafers per order.

“FAB * * *” means the wafer fabrication facility of TSMC at * * *.

“Finished Goods” means Products approved for delivery by DSPG.

“* * * Test” means additional wafer sort stage to test the * * * module.

“Hardware” means load boards, probe cards, sockets and other related accessories used in the production of Products for DSPG, and related design documentation including but not limited to the Hardware set forth in Annex B.

“IPLSRA” means the IP Library Services and R&D Agreement by and between NXP and DSPG, effective as of September 4, 2007.

“MSCA” means the Manufacturing Services Collaboration Agreement, effective September 4, 2007, relating to the manufacturing, pre-testing, assembling and final-testing of NXP Products by NXP and/or NXP Sub-contractors, as amended by the Amendment Agreement to the Manufacturing Services Collaboration Agreement dated January 27, 2009 (“AAMSCA”).

“Products” means products fabricated for DSPG using processes * * * (which includes for the avoidance of doubt * * *), including without limitation Sorted Wafers, Unsorted Wafers and Finished Goods.

“Sorted Wafers” means wafers that have been tested by NXP prior to delivery for purposes of determining Wafer Sort yield pursuant to Schedule 2 to the MSCA.

“TEA Products” means - each or collectively, as applicable - * * *. For sake of clarity, these products are based on the NXP Process named * * *.

“Test Infrastructure” means all hardware (including Hardware), software (in source code form), databases and related documentation associated with the testing of the Products, including without limitation the Test Infrastructure set forth in Annex C.

“SSMC” means Systems on Silicon Manufacturing Co. Pte. Ltd, a joint venture of NXPBV and Taiwan Semiconductor Manufacturing Company Ltd (TSMC).

“UTSA” means the Umbrella Transitional Services Agreement (schedule 7 of the Share and Business Sale Agreement dated September 3, 2007).

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“Unsorted Wafers” means Wafers produced in accordance with the applicable NXP Process specifications that are not Sorted Wafers.

“WSS” means the Service Level Agreement titled Warehousing and Shipping Services for DSPG, which is included in the UTSA.

1.2 Principles of Interpretation

The provisions of this Agreement supplement the provisions of the Contracts. The provisions of this Agreement will supersede the provisions of the Contracts only and to the extent that they explicitly conflict. Except for areas in which a conflict exists between the provisions of this Agreement and the provisions of the Contracts, the Parties intend that this Agreement be interpreted in a manner consistent with the Contracts.

2 COMMENCEMENT DATE AND DURATION OF AGREEMENT

This Agreement shall take effect immediately upon the signing of the Agreement by the Parties and shall remain in effect until the expiration of the Parties’ obligations pursuant to this Agreement.

3 CONTINUATION AND EXTENTION OF THE CONTRACTS

Except as amended and/or supplemented by this Agreement and its annexes, including without limitation the provisions regarding future prices, the MSCA and the AAMSCA shall continue in full force and effect.

3.1 The WSS is hereby extended through * * *, but may be further extended by DSPG as long as NXP is continuing to provide DSPG with Finished Goods. In exchange for the warehousing service provided under the WSS, DSPG shall pay a price * * *.

3.2 The CAEN is hereby extended through * * *, based on its current terms and conditions, but subject to the reduction of headcount and fees set forth in Annex D, with an option to further extend it for an additional * * * term under the same terms and conditions.

3.3 NXP’s provision of the Committed R&D Services, Maintenance Services, Support Services and Additional Services as defined in Sections 3, 4, 5 and 6 of the IPLSRA to DSPG and its Affiliates shall be extended through * * *, on the same terms and conditions as set forth in the IPLSRA in exchange for a payment of * * *, with an option to further extend it for additional * * * terms in exchange for * * *.

4 MANUFACTURING OF PRODUCTS AND TRANSFER OF RESPONSIBILITY

4.1 NXP guarantees that for * * * SSMC will allocate to TSMC - for the sole use of DSPG - * * * new * * * wafers from NXP’s * * * capacity at SSMC. DSPG’s entitlement to the aforesaid * * * wafers shall be in addition to DSPG’s separate entitlement to the already confirmed Purchase Orders and to the inventories (including Finished Goods and Work In Progress) that shall exist at NXP, at NXP FABs and at SSMC at * * * and which shall be ordered by DSPG (at its discretion)

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at the earliest date possible. Conditioned upon the aforesaid allocation of * * * new * * * wafers from NXP’s * * * capacity at SSMC, the fabrication of new DSPG orders during * * * for * * * wafers shall transfer from NXP to TSMC and will be done by TSMC at SSMC as shall be agreed by and between DSPG and TSMC directly. The aforementioned * * * new wafers from NXP’s * * * capacity at SSMC will be ordered by DSPG for * * * taking into account the maximum number of * * * wafer starts * * * as follows: * * * wafers in the * * * of * * *; * * * wafers * * *; * * * wafers in * * *; * * * wafers in * * *. Orders for wafers allocated to * * * may be submitted as early as required taking into account the lead times as set forth in Annex H.

4.2 The Parties will use their best efforts to enable TSMC to fabricate * * * wafers at FAB* * *. DSPG will use its best efforts to follow the same qualification schedule that NXP follows for its other customers. NXP will use its best efforts to give full transparency to DSPG on technical, timing and planning aspects of the project. DSPG will consent to the transfer of * * * related products to FAB* * * conditioned upon, in addition to the conditions set in the Contracts between the Parties, the (a) satisfactory completion of process and product qualification; and (b) obtaining the approval of DSPG’s customers, which DSPG procures will not be unreasonably withheld.

4.3 The first * * * wafers (up to * * *) that will be fabricated at FAB* * * before * * * will be allocated to DSPG on top and in addition to the allocation guaranteed under section 4.1 supra. NXP- undertakes to have TSMC fabricate as soon as possible such additional * * * new wafers at FAB* * * for DSPG

4.4 NXP will ensure that SSMC will allocate * * * new * * * wafers from NXP’s * * * capacity at SSMC to TSMC, for DSPG. The allocated capacity shall be spread * * * and shall be in addition to the * * * capacity allocated to TSMC under this Agreement for use by DSPG.

4.5 If FAB* * * will not be able and qualified to fabricate and deliver to DSPG * * * new * * * wafers during * * *, NXP will allocate to DSPG from its * * * capacity at SSMC the difference between the guaranteed * * * wafers and the actual number of wafers supplied to DSPG by FAB* * * during * * *. If FAB* * * will not be able and qualified to fabricate and deliver to DSPG * * * new * * * wafers during * * *, NXP will allocate to DSPG from its * * * capacity at SSMC the difference between the guaranteed * * * wafers and the actual number of wafers supplied to DSPG by FAB* * * during * * *. For the avoidance of doubt, the aforementioned obligation to allocate the difference is in addition to NXP’s other capacity obligations under this Agreement.

4.6 Newly produced wafers will be deducted from the agreed quota of * * * in which they were completed (“fab-out”), unless there has been a delay that is not the fault of DSPG, in which case the wafers will be deducted from the agreed quota of the quarter in which they were supposed to be completed (absent the delay).

4.7 Conditioned upon adequate technical support from NXP (as set forth in Annex E), the sorting of new * * * wafers will transfer as soon as possible from NXP to a third party provider qualified by DSPG. Such qualification will occur on market standard conditions and without undue delay.

4.8 * * * manufacturing and supply of * * * wafers will continue by NXP at * * * until * * *. * * * and * * * manufacturing and supply of * * * and * * * wafers will continue by NXP at one of its FABs until * * *.

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4.9 According to the current Long-Term Plan, DSPG’s projected demand for * * * wafers is as follows: for * * * – * * * wafers; for * * * – * * * wafers; for * * * – * * * wafers; for * * * – * * * wafers.

4.10 The prices for unsorted * * * wafers that shall be fabricated from * * * to * * * shall not exceed $* * *. The prices for sorted * * * Dies that shall be fabricated from * * * to * * * shall not exceed the following prices: for * * *: $* * *; for * * *: $* * *; for * * *: $* * *.

4.11 Throughout * * *, NXP will continue to provide DSPG with sorted * * * wafers. Starting from a date in * * * to be agreed upon by the parties - no later than * * * - NXP will switch to providing DSPG with unsorted * * * wafers.

4.12 In the * * * delivery of unsorted * * * wafers to DSPG, NXP shall be entitled to require DSPG to purchase (take or pay) any remaining * * * wafers that have been pre-produced by NXP based on the * * * forecast included in the first STPs for * * * and * * * of * * * onward. To facilitate DSPG’s STP planning and thus help both parties avoid the creation of redundant inventories, NXP will provide DSPG with * * * inventory reports and WIP reports.

4.13 For * * *, the guaranteed capacity will remain until * * * as agreed in the MSCA.

4.14 The agreed prices for the * * * products detailed below that shall be fabricated from * * * to the end of * * * shall be as follows:

4.14.1 The price of unsorted * * * wafers shall not exceed $* * *.

4.14.2 The price of unsorted * * * wafers shall not exceed $* * *.

4.14.3 The price of unsorted * * * wafers shall not exceed $* * *.

4.14.4 The price of sorted * * * Dies shall not exceed $* * *.

4.14.5 The price of sorted * * * Dies shall not exceed $* * *.

4.14.6 The price of sorted * * * Dies shall not exceed $* * *.

4.14.7 The price of Finished Goods * * * shall not exceed $* * *.

4.15 Throughout * * * NXP will continue to provide DSPG with sorted * * * wafers and * * * Finished Goods. Starting from a date in * * * to be agreed upon by the parties - no later than * * * - NXP will switch to providing DSPG with unsorted * * * and * * * wafers.

4.16 For * * * and * * * NXP will continue to provide sorted wafers from APK until * * *.

4.17 For the following products, NXP will continue to supply Finished Goods until * * *: * * *. The prices of these products will * * * compared to the * * * by DSPG for these products during the * * * (as set forth in Annex F).

4.18 From * * * DSPG will become responsible for managing the Supply Chain of * * * and will release NXP from its obligation to supply these products as Finished Goods. The pre-conditions for the aforementioned transfer of responsibility, is that NXP shall provide - and DSPG will be able to successfully implement - an appropriate supply chain interface that will comply with the requirements set forth in Annex G-1 and that the way of work with APK will comply with the requirements set forth in Annex G-2. With regard to * * *, a pre-condition to the aforementioned transfer of responsibility is that APK will create a * * * for DSPG. Until the aforementioned

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transfer of responsibility will take place, the prices of the aforementioned products shall * * * compared to the * * * for these products by DSPG during the * * * (as set forth in Annex F). Notwithstanding anything to the contrary, until * * * NXP will continue to provide DSPG in APK with NXP Back-end Services for these products for * * * for which these services are provided during the * * *.

4.19 NXP will continue to provide DSPG (via APK) with sorted * * * wafers until * * *. The price for * * * sorted Die shall not exceed $* * * for the aforementioned period. The price for * * * sorted Die shall not exceed $* * * for the aforementioned period.

4.20 For the * * * Products, NXP will continue to supply Finished Goods until * * *, except for * * * which will be handled as described below. The prices of * * * Products that shall be fabricated by NXP until * * * shall * * * compared to the * * * for these products by DSPG during the * * * (as set forth in Annex F).

4.21 NXP will continue to supply * * * as Finished Goods until * * * with wafer sorting performed at APK. Prior to * * *, the Parties shall transfer from APK to DSPG’s third party provider the * * * wafer sort process, after which DSPG will become responsible for * * * wafer sorting. NXP will continue to fabricate unsorted * * * wafers for DSPG until * * *. The price for unsorted * * * wafers fabricated from * * * to the end of * * * shall not exceed $* * *. DSPG will review business development during * * * and will consider whether to accelerate the end-of-life process for the * * * from * * *.

4.22 NXP will allocate to DSPG at TSMC the following irrevocable * * * capacity for * * * until ultimately * * *: * * * new * * * and * * * wafers; * * * new * * * wafers.

4.23 The lead time for the products detailed in section 4, shall be as set forth in Annex H.

5 GRANT OF LICENSES, TRANSFER OF INFRASTRUCTURE, AND CONTINOUS SUPPORT

5.1 To enable the successful transfer of responsibility and the continuous manufacturing of products described in section 4 supra:

5.1.1 The Parties shall cooperate in good faith, and NXP shall use its best efforts and make available sufficient resources to complete the tasks in the Production Ramp-Up Procedures Checklist set forth in Annex I as soon as practicable but no later than * * *.

5.1.2 NXP shall transfer all rights, ownership and title of the * * * at the agreed consideration of USD* * *, free and clear of all liens and encumbrances to DSPG as specified in Annex B. To the extent applicable, DSPG shall designate in advance to NXP the destination(s) to which some of the * * * should be transferred, and NXP shall take full responsibility for the transfer of such * * *.

5.1.3 NXP will provide to DSPG * * * the * * * (see also Annex C), and will use its best efforts to provide test training to DSPG personnel with respect to the Products, in accordance with such procedures as reasonably agreed by and between DSPG and NXP.

5.1.4 NXP hereby grants to DSPG and its Affiliates effective as of the date hereof, a perpetual, non-transferable, irrevocable, world-wide, royalty-free, fully paid-up license, to the intellectual

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property rights associated with the * * *, including, without limitation, * * * for the agreed products, thus allowing DSPG and its Affiliates (directly and through its contractors), to use the * * * for the purpose of * * * only.

5.1.5 NXP hereby grants to DSPG and its Affiliates effective as of the date hereof a perpetual, non-transferable, irrevocable, world-wide, royalty-free, fully paid-up license, to the intellectual property rights associated with the * * * set forth in Annex A, thus allowing DSPG and its Affiliates (directly and through its contractors), to use the * * * all within the scope of this Agreement and for the purpose agreed therein.

5.2 NXP grants, by separate instruments, to TSMC and its Affiliates and FABs (including, without limitation, SSMC), a perpetual, non-transferable, irrevocable, world-wide, royalty-free, fully paid-up license - to be used solely for the fabrication of wafers and products for DSPG - to the intellectual property rights associated with the following fabrication processes: * * *, all within the scope of this Agreement and for the purpose agreed therein.

6 PENALTIES

6.1 The Parties agree that the penalties clauses of the MSCA shall remain in effect only for * * *, wafers.

THIS AGREEMENT IS AGREED AND SIGNED ON December 8, 2010 BY:

DSP GROUP LTD.
/S/ DROR LEVY
Name:	Dror Levy
Title:	CFO
DSP GROUP, INC
/S/ DROR LEVY
Name:	Dror Levy
Title:	CFO
/S/ GILAD YEHUDAI
Name:	Gilad Yehudai
Title:	VP Finance
NXP SEMICONDUCTORS NETHERLANDS B.V.
/S/ CHRISTOPHER BELDEN
Name:	Chris Belden
Title:	SVP Operations
/S/ CHARLES SMIT
Name:	Charles Smit
Title:	Director

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ANNEX A

Design, Test and Software Tools

* * * License package:

• The license is extended until * * * and will be extended for * * * more, if there is a request from DSPG and if DSPG continues to manufacture, sell and use applicable products

• No support can be provided for any software.

The list of available software/tools is the following

* * * Tools Package (* * *)

* * *

Only for front end - for new designs

* * *

Software application

* * *

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ANNEX B

Hardware

Specific hardware will be transferred when DSPG will take ownership for the specific product.

Docking plates, Sockets and Change Kits will be shared by ASEN according to DSPG production needs

1. * * * Wafer Sort

Final quantities will be determined by DSPG prior to ownership transfer based on following quotation

Probe Card	Type	Future prod site	Platform	Test site	Quotation(usd/pcs)
***	***	***	***	***	***

2. Other Wafer Sort

Probe Card	Type	Future prod site	Platform	Test site	Quotation (usd/pcs)	Qty	amount (USD)
***	***	***	***	***	***	***	***

3. Final Test

Loadboard	Type	Future prod site	Platform	Test site	Quotation (usd/pcs)	Qty	amount (USD)
***	***	***	***	***	***	***	***

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ANNEX C

Test Infrastructure

1. ***

2. ***

3. ***

4. ***

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ANNEX D

CAEN Headcount and Fees

***.

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ANNEX E

Requirements for Transferring of the * * * Process

1) NXP Nijmegen team to provide to DSPG source files for * * * programs and also applicable * * * test related documentation.

2) NXP Nijmegen team to be available for Email/Phone support for questions related to the maintenance of the transferred * * * programs, until final release of the test operation at third party and no later than * * *. Such support to be provided within reasonable time (* * * hours).

3) DSPG will do test program study as part of the test transfer and will determine if knowledge acquired during this process is sufficient for further * * * production maintenance.

4) * * * program training will be performed by NXP for DSPG test engineers on site at * * * if needed after transfer above (such need to be determined by DSPG and NXP test engineering team in mutual agreement).

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ANNEX F

Actual Prices Paid in * * * For Finished Goods

*** *** ***

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ANNEX G-1

Requirements for a Supply Chain Interface

1. Work In Process – * * * transaction of WIP Lots at APK including all relevant attributes.

2. Invoice – Invoicing from NXP to DSPG on * * *

3. Shipping Interface – Shipping Instructions, Shipping Confirmation and additional required shipping documents.

4. Build Request and Purchase Order – * * *, Lot level instructions and orders for production execution at APK from DSPG and * * * Lot level confirmation from NXP via * * *.

5. IT focal point at * * *

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ANNEX G-2

Requirements for a Way of Work with APK

6. No change of logistics parameters as used in this agreement by NXP – * * *, etc.

7. Capacity Reservation and confirmation based on * * * forecast.

8. Die Bank service (for * * * products, where needed)

9. Full transparency of test * * * status using a * * * report or upon request.

10. Full transparency of assembly materials to support production (* * *, etc.) using * * * reports.

11. * * * handling procedures.

12. Planning focal point at APK.

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ANNEX H

Lead Time Table

*** *** *** *** *** ***

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ANNEX I

Production Ramp-Up Procedures

*** ***

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