EXHIBIT 99.1

                 SPC ACQUISITION ADDS BREAKTHROUGH HIERARCHICAL
                 CAPABILITIES TO CADENCE SOC DESIGN TECHNOLOGY

          Full-Chip Virtual Prototyping Complements SP&R Solutions to
                   Accelerate Design of Very Large-Scale ICs

            SAN JOSE, Calif. - November 7, 2001 - Cadence Design Systems, Inc.
(NYSE: CDN), the world's leading supplier of electronic design products and
services, today announced it has signed a definitive agreement to acquire
Silicon Perspective Corp. (SPC), a privately-held design technology firm
headquartered in Santa Clara, California. The financial terms of the agreement
were not disclosed. Cadence(R) expects the acquisition to be completed in
December 2001.

            First Encounter, SPC's advanced virtual prototyping tool, includes
hierarchical floorplanning, placement, and analysis that reduce cycle times for
large designs. First Encounter will augment both current PKS/Silicon
Ensemble(R)(SE)-PKS and future Integration Ensemble (IE) for SoC synthesis,
place & route (SP&R) design technology from Cadence, thus enabling designers to
complete very large chips faster. First Encounter is currently used in
conjunction with Cadence SP&R at numerous customer sites, with proven success.

            Upon completion of the acquisition, Cadence will immediately be able
to provide a solution that accelerates the implementation of very large designs
containing several millions of gates, based on advanced SPC technology and the
proven, industry-leading Cadence IC implementation tools, PKS and SE-PKS.
Cadence channel strengths are expected to accelerate the proliferation of SPC's
technology into the market.

            "The SPC acquisition brings Cadence the leading virtual prototype
solution available today," said Ray Bingham, president and CEO of Cadence.
"SPC's technology allows designers to explore physical implementation
feasibility - an early, accurate view of a very large design - in a matter of
hours, before going through a detailed back-end process. The combination of PKS
and SE-PKS with SPC's leading-edge virtual prototyping will provide our
customers with the most complete, compelling solution in the electronic design
marketplace."

            The combination of SPC's First Encounter and PKS/SE-PKS creates the
highest capacity physical design flow available for large-scale SoCs. With this
electronic design technology solution, engineers can explore the impact of
implementation choices on chip performance and physical viability. IC designers
can use First Encounter to produce a high quality floor plan, and then complete
the implementation using PKS/SE-PKS.

            "First Encounter is widely acknowledged as the best prototyping
product available," said Ping Chao, SPC's CEO. "By joining forces with Cadence,
we can better address the design community's needs. The combination of our teams
will enable us to quickly serve many more customers with this technology."

            "Hierarchical implementation based on a full-chip virtual prototype
is the high-performance strategy for multi-million gate designs," said Lavi Lev,
senior vice president and general manager for the Cadence IC Solutions Business.
"SPC significantly augments the proven

Cadence existing solution to more completely meet our customers' most demanding
IC design needs."

            Once the acquisition is completed, SPC will operate as a separate
group within Cadence. SPC will continue to work out of its headquarters building
in Santa Clara, and its 70 employees will become Cadence employees. Cadence and
SPC will continue to support First Encounter in use with non-Cadence physical
design technology.

            ABOUT SPC

            SPC helps engineers to create full-chip silicon virtual prototypes
that provide design closure throughout the design cycle, from RTL through
placement based on internal routing prediction. SPC was founded in 1996. It
provides electronic design tools that bridge the gap between front-end logic
designers and the back-end physical realm. SPC targets the ASIC, COT, and SoC
marketplaces, specifically for designs in excess of one million gates with
process geometries of 0.18 micron and below. More information about the company,
its products and services are available at www.siperspective.com.

            ABOUT CADENCE

            Cadence is the largest supplier of electronic design technologies,
methodology services, and design services. Cadence solutions are used to
accelerate and manage the design of semiconductors, computer systems, networking
and telecommunications equipment, consumer electronics, and a variety of other
electronics-based products. With approximately 5,700 employees and 2000 revenues
of approximately $1.3 billion, Cadence has sales offices, design centers, and
research facilities around the world. The company is headquartered in San Jose,
Calif., and traded on the New York Stock Exchange under the symbol CDN. More
information about the company, its products and services are available at
www.cadence.com.

            Except for historical information, the matters discussed in this
release contain forward-looking statements based on current expectations or
beliefs and are subject to factors and uncertainties that could cause actual
results to differ materially from those described in the forward-looking
statements. For a detailed discussion of these and other cautionary statements,
please refer to Cadence's filings with the Securities and Exchange Commission.
These include the Company's annual Report on Form 10-K for the year ended
December 30, 2000 and the most recent Quarterly Report on Form 10-Q for the
quarter ended June 30, 2001.

            Cadence and the Cadence logo are registered trademarks of Cadence
Design Systems, Inc. All other trademarks are the property of their respective
owners.

For more information, please contact:

Judy Erkanat
Cadence Design Systems, Inc.
408-894-2302
jerkanat@cadence.com