Exhibit 99.1

Press Release

EDITORIAL CONTACT:
Jana Knezovich, PR Manager
+1 408-864-5987
jana.knezovich@verigy.com

INVESTOR CONTACT:
Judy Davies, VP, Investor Relations
+1 408-864-7549
judy.davies@verigy.com

Verigy Signs Agreement to Acquire Inovys

To Offer Best-in-Class Time-to-Yield for Semiconductor Manufacturing

CUPERTINO, Calif. —Dec. 6, 2007— Verigy (NASDAQ: VRGY), a premier semiconductor test company, and Inovys today announced that they have signed a definitive agreement for Verigy to acquire Inovys. Inovys, privately held, provides innovative solutions for design debug, failure analysis and yield acceleration for complex semiconductor devices and processes. Financial details were not disclosed. The acquisition is expected to be final in 30 to 60 days, subject to certain closing conditions.

This acquisition enables Verigy to offer a best-in-class, integrated time-to-yield solution for semiconductor manufacturers. Inovys’ products uniquely bridge the gap between electronic design automation (EDA) and test, providing a seamless path between design and production. Inovys has created a comprehensive test suite that enables semiconductor companies to reduce design debug from weeks to hours, lower production test costs by a factor of up to three, and support real-time yield enhancements with unique failure analysis tools. Inovys tools combined with Verigy’s proven V93000 SoC test platform have shown tremendous economic benefits in a recent customer experience.

The design complexity of advanced system-on-chip (SoC) devices combined with challenging nanoelectronics process technologies drives up the cost of

manufacturing. The 300mm fabs are very capital-intensive. Return-on-investment requires achieving a specified level of yield, or “entitled yield”. Minimizing the time required to reach that yield becomes critical. Additionally, the challenges of the distributed manufacturing model used between fabless companies and their foundry partners drive demand for higher levels of integration for design and production test.

“Time-to-entitled-yield becomes a critical metric that places the focus squarely on test,” said Keith Barnes, chairman, CEO and president of Verigy. “Verigy’s production workhorse V93000 system combined with Inovys’ design-for-test and design-for-manufacturing tools have demonstrated significant time-to-yield value for Verigy customers. Inovys’ and Verigy’s solid track records for technology innovation, quality products and superb customer service will allow us to raise the bar in delivering world-class solutions to the industry.”

“Joining forces with Verigy will expand Inovys’ reach and accelerate our ability to develop solutions at the crossroads of design, manufacturing and yield metrology,” said Paul Sakamoto, Inovys’ CEO. “Together we bridge the gap between design validation/silicon debug and high-volume manufacturing. We are excited to have found a company with such a complementary culture, product line, commitment to customer satisfaction, and vision — and with Verigy’s increasing market share at the more challenging designs and process nodes, we are even more confident of our success moving forward.”

Inovys was established in 1999. Despite its relatively small size, it has garnered a substantial customer base of more than 50 customers representing integrated device manufacturers (IDMs), fabless, outsource semiconductor assembly and test (OSAT) and foundry companies which are a good complement to Verigy’s customer base.

Inovys earned the top spot in the esteemed VLSI Research 2007 10 BEST Test Equipment Award for Customer Satisfaction, and the Technology Innovation Showcase Award for its YieldVision software at SEMICON West in July 2007.

More information about the acquisition will be presented at the Verigy-hosted Analyst Event on December 11, 2007 at 2:00 PM ET, at The Westin New York at Times Square Hotel, 270 West 43rd Street, New York City. A live webcast of the meeting will be available in listen-only mode. Listeners may log on at http://investor.verigy.com and select “2007 Analyst Day” in the “Webcasts & Presentations” section.

About Inovys Corporation

Inovys provides innovative yield enhancement, failure analysis, and design debug solutions for the semiconductor industry. Inovys customers include the industry leading Integrated Device Manufacturers (IDMs), Fabless companies, Foundry and Test subcontractors. These companies use Inovys solutions to accelerate their new product introductions and optimize yield ramps of their advanced system on chip (SOC) devices. The revolutionary Inovys Design For Test (DFT) analysis toolset enables customers to reduce electrical failure resolution cycle times from weeks to hours. Learn more about Inovys at www.inovys.com.

About Verigy

Verigy designs, develops, manufactures, sells and services advanced test systems and solutions for the memory and system-on-chip segments of the semiconductor industry. Verigy’s scalable platform systems are used by leading semiconductor companies worldwide in design validation, characterization, and high volume manufacturing test. Formerly part of Agilent Technologies, the company began doing business as Verigy on June 1, 2006, and completed its initial public offering on June 13, 2006. Information about Verigy can be found at www.verigy.com.

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Forward-Looking Statements

This news release contains forward-looking statements as defined in the Securities Exchange Act of 1934 and is subject to the safe harbors created therein. The forward-looking statements contained herein include, but are not limited to, the timing of closing the acquisition, the ability to integrate Verigy’s and Inovys’ products and the customer benefits that will be derived from this integration as well as statements that include words such as expect, anticipate, intend, plan, believe, estimate and variations of such words and similar expressions. These forward-looking statements are based on current information and estimates, and are not guarantees of future performance or events. These statements are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. The risks and uncertainties include, but are not limited to, events which could postpone or cause the acquisition not to close, demand for the combined solutions specifically and demand semiconductors

and thus for semiconductor test solutions. Additional factors that may cause Verigy’s results to differ materially from those in the forward-looking statements are discussed in our Quarterly Report on Form 10-Q for the quarter ended July 31, 2007. The forward-looking statements, including guidance, are only valid as of this date, and Verigy undertakes no duty to update any forward-looking statements.

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